COMPUTERS AND MORE

In any computer the execution of a single instruction requires various activities to be performed, such as instruction accessing, instruction interpretation, operand accessing and arithmetic. If separate hardware units carry out these activities their operations can be overlapped to give an increased rate of completion of instructions. This technique, first introduced in the early 1960s in computers such as Atlas and Stretch, has become known as pipeline concurrency. In a pipelined computer several partially completed instructions are in progress concurrently, and although the time to complete any one instruction is still limited by the sum of the times for the various activities, the rate at which instructions progress through the pipeline is only limited by the time for an individual activity. In Atlas and Stretch the number of concurrent operations was of the order of four. In modern systems pipeline concurrency can extend to several tens of instructions and may be used in both arithmetic and instruction processing units.